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When it comes to the CPU industry, the battle for market superiority has long been contested by heavyweights Intel and AMD. However, the technology boffins at Tilera are looking to upset the status quo after unveiling the TILE-Gx platform, which just so happens to include the world’s first 100-core processor.
Tilera unveils world\'s first 100-core CPU. Image: Tilera.
While also offering up CPU variants with core capacities of 16, 36 and 64, it’s the 100-core TILE Gx100 that catches the eye as the chipmaker’s notably muscular release. That being said, Tilera claims all four of its new CPUs raise the bar for performance-per-watt, with ten times better compute efficiency when compared to Intel’s next-gen Westmere processors.
“We believe this next generation of high-core count, ultra high-performance chips will open completely new computing possibilities,” enthused Tilera CEO Omid Tahernia.
“Customers will be able to replace an entire board presently using a dozen of more chips with just one of our TILE-Gx processors, greatly simplifying the system architecture and resulting in reduced cost, power consumption, and PC board area,” he added. “This is truly a remarkable technology achievement.”
In terms of manufacturing and target markets, the TILE-Gx family is aimed at enterprise networking, cloud computing, multimedia and wireless infrastructure, has been fabricated using the TSMC 40nm process, and operates at up to 1.5GHz with power consumption ranging from 10 to 55 watts.
Individual technology highlights include the following:
Next-generation 64-bit core: new three-issue 64-bit core with full virtual memory system. Each core includes 32KB L1 I-cache, 32KB L1 D-cache and 256KB L2 cache, with up to 26MB total L3 coherent cache across the device.
Enhanced SIMD instruction extensions: Improved signal processing performance with a 4 MAC/cycle multiplier unit delivering up to 600 billion MACs per second, more than 12x the fastest commercial DSP.
Integrated high-performance DDR3 memory controllers: Two or four 72-bit controllers running up to 2133 MHz speeds with ECC support. Up to 1TB total capacity and powerful memory striping modes for maximum utilization.
Hardware acceleration engines: On-chip MiCA (Multistream iMesh Crypto Accelerator) system delivers up to 40Gbps encryption and 20Gbps full low latency and wire-speed small packet throughout. In addition, a high-performance true random number generator (RNG) and public key accelerator enable up to 50,000 RSA handshakes per second.
Packet processing accelerator: mPIPE (multicore Programmable Intelligent Packet Engine) system provides wire-speed packet classification, load balancing and buffer management. This flexible, C-programmable engine delivers 80Gbps and 120 million packets-per-second of throughput for packets with multiple layers of encapsulation.
First out of the blocks will be the TILE-Gx36 processor, which will be sent for sampling during the fourth quarter of 2010. California-based Tilera Corp. has indicated that the remaining three offerings will be unleashed before the end of 2011’s second quarter.
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